BUS DEFINITION Revision A:

(Note this is the bus definition from System-4 all old cards have now been modified to use Rev. B of the bus definition. Bus no longer supplies -12V and +12V, N0 and N1 now replace those supplies.

1        +5V                                    _____________
2        Data 0                                |                       |
3        Data 1                                |                       |
4        Data 2                                |                       |
5        Data 3                                |Component       |
6        Data 4                                |Side                 |
7        Data 5                                |                       |
8        Data 6                                |1……….....30  |
9        Data 7                                |_____________|
10      Q
11      TPA
12      TPB
13      -MRD
14      -MRW
15      Address 0
16      Address 1
17      Address 2
18      Address 3
19      Address 4
20      Address 5
21      Address 6
22      Address 7
23      -Interrupt
24      N2
25      -EF4 (Old Wire wrap CPU card used -EF4 for front panel I/O)
26      -VMA
27      -RESET
28      -12V
29      +12V
30      GND
 

Most signals are connected directly from the 1802 are unbuffered.

-VMA (Valid Memory Address): is used to support directing the CPU to an address other then 0x0000 at reset. -VMA is an active low signal indicating the address on the bus is valid. Immediately after a reset the VMA circuit on the CPU card may, hold VMA high forcing the CPU to read on board memory remapped to 0x0000. Memory selection circuits must combine this signal with any other address information during decoding.

-RESET: is an active low signal other cards can use as a reset signal. In original wire wrapped System-4 -RESET is generated from the   System-4 Front panel card not from the CPU card.

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